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The evolution of the processor and PC platform has created widespread user expectations for higher performance without parallel increases in cost. The Intel Architecture Labs is chartered with identifying and removing these technical roadblocks to enable OEMs to develop cost-effective system designs.
- Suppression of EMI - Clocks on the Front Side Bus (FSB), SDRAM motherboard and Back Side Bus (BSB) are principal EMI generators in Pentium® II processor based PCs. With the new FCC "open box" regulations, merely containing EMI is inadequate. For future high performance systems EMI must be suppressed. Suppression techniques include complementary clocks, SECC shielding inside Pentium II processor S.E.C. covers and spread-spectrum clocking (SSC). Intel has released notes on SSC and It's Timing Impacts, and AGP Interface Architectures and Motherboard Design with SSC to assist developers in the use of SSC. Intel also has published guidelines for implementing the 100MHz SDRAM clock buffer.
- Power delivery - VID pins will allow VRM8.1 solutions to handle the transition from 2.8V to 2.0V. As processor frequencies rise above 350 MHz, VRM8.2 solutions will be required.
- Interconnect technology - System performance enhancements, such as AGP, continue to drive increases in the system bus. (See the "100 MHz System Bus Interconnect Design" article in Issue 8 of Platform Solutions.) Intel has also made guidelines available on AGP2X ,100 MHz SDRAM Memory Bus Routing, and 100 MHz FSB layout. OEMs should also drive their tool vendors to simplify their implementation challenges by providing 3D simulation tools. Intel has provided a paper on "Designing 100 MHz Interconnects" that describes the benefits of such tools.
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With potential system design roadblocks removed, vendors are able to develop the needed ingredients for OEMs to deliver cost-effective high-performance PCs. At the Intel Developer Forum and through the Intel Developer Web site Intel continues to provide platform developers with detailed implementation techniques in key system design areas.
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The industry's ability to design higher performance platforms without escalating costs will help meet user expectations for more capable PCs available at the lowest possible prices.
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The Intel Architecture Labs will continue to develop and deliver advanced design technologies enabling OEMs to meet the demand for higher-performance products at volume price points.
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Tool vendors and platform developers should plan to attend the September 1998 Intel Developer Forum for design implementation guidelines and information. Developers should also visit Platform Solutions on a regular basis and the Intel developer web site for the latest design-related information.
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For regular updates, frequently visit the System Design Technology page of Platform Solutions.
Read the Top Story, "System Design Technologies Remove Roadblocks to Performance," by Martin Rausch - Manager, Electrical Platform Technologies—in Issue 6 of Platform Solutions.
Visit the Pentium® II processor application notes page.
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* Legal Information © 1998 Intel Corporation
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